1. Field of the Invention
The present invention relates to input filters for phase current sensing circuits used in A.C. motor drive systems, and more particularly to improved filters for eliminating ripple noise which can affect the accuracy of motor current control.
2. Relevant Art
Modern motor drives generally utilize pulse width modulation (PWM) switched inverters to generate motor drive currents having precisely controlled characteristics. Such systems are particularly advantageous because they are low in cost, and exhibit low power dissipation.
FIG. 1 shows a simplified schematic diagram of a conventional PWM motor drive, generally denoted at 10. Here, incoming two or three-phase A.C. power is provided to a rectifier circuit 12 which provides D.C. to an inverter 14 on buses 16 and 18. The inverter, in turn, provides controlled alternating current to motor 20 over lines 22a-22c. 
Numerous inverter designs exist, but these generally incorporate pairs of power semiconductor switches (not shown) such as metal oxide semiconductor field effect transistors (MOSFETS) or insulated gate bipolar transistors (IGBTS) for each motor phase. These are switched on and off by pulse width modulated (PWM) gate control signals provided by a PWM control circuit 24 over a signal path 26.
For a three-phase motor, control circuit 24 compares a triangular wave at a fixed frequency fPWM with three sinusoidal reference signals that are 120xc2x0 out of phase, and generates the PWM gate drive signals at the cross-over points between the triangular wave and the reference signals. The reference signals are derived from phase current feedback signals which can be provided in various ways, e.g., by measuring the voltage drops across sensing resistors 28a-28c in motor current drive lines 22a-22c. The desired motor speed may be determined according to an independently controlled speed set point signal 30. This technology is well known to persons skilled in the art, and further description will be omitted in the interest of brevity.
A major problem with PWM inverter motor drives is that the current provided by inverter 14 contains a significant ripple component. The typical appearance of the drive current is illustrated in FIG. 2, line (a). This is comprised of a signal component, typically in the 0-500 Hz range (line (b)), and an inverter noise component (line (c)). When the drive current is analyzed in the frequency domain, the noise components are found to be at the frequency fPWM and its harmonics, typically at 4 kHz and above.
A straightforward approach to eliminating the noise would seem to be simply to attenuate the frequency components above 4 kHz by using a low pass conventional filter. This method, however, would impact two incompatible requirements:
To obtain a signal to noise ratio on the order of 60 dB requires a sharp transition, which requires many poles (order  greater than 5) near 500 Hz.
To avoid an excessive delay in the control loop, the filter must introduce a very small phase delay in the passband, which requires a low order filter and poles far from 500 Hz.
Because of these conflicting requirements, the low pass filter approach cannot effectively be used.
In practice, the noise components of the phase currents are dealt with in one of two conventional ways. One approach is to sample the current signal at a random frequency without any synchronization with the PWM signal. This solution, however, does not reject ripple and high frequency noise (leaving a noise component as high as 30% of the signal).
Another approach is synchronous sampling with the transitions of the triangular wave. If the carrier frequency is much higher than the frequency of the PWM reference signal, the ripple component of the current signal is theoretically null at the positive and negative peaks of the triangular wave. The current is sampled at these instants. This solution is not sufficient to obtain 60 dB (equivalent to 10 bits of resolution) of signal to noise ratio during the normal operation of the system because high frequency asynchronous noise and dead time in the inverter""s switching deteriorate the S/N ratio.
It is also possible to use a broadband sensor coupled with a filter. This, however, is expensive, and requires tradeoff between residual ripple and processing delay.
In summary, none of the conventional methods are able to totally solve the problem of ripple or to react with a delay smaller than half the PWM period. It would therefore be extremely desirable to have a better way for eliminating or minimizing the high frequency noise components while also providing rapid response to phase current changes. The present invention seeks to satisfy that need.
It is accordingly an object of the present invention to provide an improved input filter for phase current sensing in PWM motor drives.
A further object of this invention is to provide an improved input filter which effectively reduces high frequency noise in the phase current feedback signal at the frequency of the PWM triangular wave and harmonics thereof.
A related object of this invention is to provide such an improved input filter which also exhibits rapid response to phase current changes.
Another object of the invention is to provide an input filter which is self-adaptive to the changes in the switching characteristics of the inverter
These objects are achieved according to the invention, in a PWM motor drive system of the type described by an improved input filter for the gate driver control circuit which includes an integration circuit having an operating cycle triggered by a SYNC signal generated by the system microcontroller at a frequency which is an integer multiple or ratio of the frequency fPWM of the triangular wave. Preferably, the frequency is twice the frequency of the triangular wave.
According to one aspect of the invention, the improved input filter includes an integration circuit comprised of a first integrator coupled directly to a signal representing the motor drive current, a second integrator coupled to the motor drive current signal through a delay circuit which introduces a delay equal to one-half the period of the PWM triangular wave, a subtraction circuit coupled to outputs of the first and second integrators, and a sample and hold circuit operated at twice the frequency fPWM.
According to a second aspect of the invention, the integration circuit is comprised of a voltage-to-time converter which integrates the phase current signal over a first interval equal to one-half the period of the PWM triangular wave, which reduces the value of the integrated phase current signal during a succeeding half-period of the PWM triangular wave by the integrated value of a reference signal of opposite polarity to the motor drive current signal, and which provides an indication when an output from the integration circuit returns to a predetermined level (e.g., zero) during the second interval.
Further according to the second aspect of the invention, the voltage to time converter includes an integrator, a first switching element which couples the phase current signal to an input of the integrator, and a second switching element which couples the reference signal to the integrator input, in which the first switching element is alternatingly turned on and off for successive first and second intervals equal to the half-period of the PWM triangular wave, the second switching element is turned off during the first interval and is turned on during the second interval, and which includes a level detector which provides an indication when the integrator output returns to the zero level during the second interval.
Still further according to the second aspect of the invention, the filter circuit is comprised of a second voltage to time converter which includes a second integrator, a third switching element which couples the motor drive current signal to an input of the second integrator, and a fourth switching element which couples the reference signal to the input of the second integrator, and in which the third switching element is alternatingly turned on during the second interval and turned off during the first interval, the fourth switching element is turned on during the first interval and is turned off during the second interval; and in which the level detector provides an indication when an output from the second integrator returns to the zero level during the first interval.
According to a third aspect of the invention, the improved filter is comprised of a switched capacitor (SC) integration circuit operated by a high-speed clock synchronized with a SYNC signal generated by the system microcontroller at the frequency of the PWM triangular wave connected to an analog to digital converter (ADC) through a sampling switch which samples the integrator output every half-period of the SYNC signal.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.